dec tmp1

brne ac128_l3

nop

nop

dec tmp3 // 1 cycle

brne ac128_l1 // 2 cycles

dec tmp3

in tmp, PINB // 1 cycle

st Y+, tmp // 2 cycle

.endm

.macro ANALYZE_CLK_256

ac256_l0:

in tmp, PINB // 1 cycle

st Y+, tmp // 2 cycle

ldi tmp1, 83 // +250 cyle

ac256_l2:

dec tmp1

brne ac256_l2

nop

dec tmp3 // 1 cycle

brne ac256_l0 // 2 cycles or

// 1 cycle

dec tmp3 // 1 cycle

ac256_l1:

in tmp, PINB // 1 cycle

st Y+, tmp // 2 cycle

ldi tmp1, 83 // +250 cyle

ac256_l3:

dec tmp1

brne ac256_l3

nop

dec tmp3 // 1 cycle

brne ac256_l1 // 2 cycles

dec tmp3

in tmp, PINB // 1 cycle

st Y+, tmp // 2 cycle

.endm

.macro ANALYZE_CLK_VN

acv_l0:

in tmp, PINB // 1 cycle

st Y+, tmp // 2 cycle

dec tmp3 // 1 cycle

brne acv_l0 // 2 cycles or

// 1 cycle

dec tmp3 // 1 cycle

acv_l1:

in tmp, PINB // 1 cycle

st Y+, tmp // 2 cycle

dec tmp3 // 1 cycle

brne acv_l1 // 2 cycles

dec tmp3

in tmp, PINB // 1 cycle

st Y+, tmp // 2 cycle

.endm

.org 0

rjmp RESET

nop;rjmp INT0

nop;rjmp INT1

nop;rjmp TIMER1_CAPT

nop;rjmp TIMER1_COMPA

nop;rjmp TIMER1_COMPB

nop;rjmp TIMER1_OVF

rjmp TIMER0_OVF

nop;rjmp SPI_STC

rjmp USART_RXC

nop;rjmp USART_UDRE

nop;rjmp USART_TXC

nop;rjmp ANA_COMP

nop;rjmp INT2

nop;rjmp TIMER0_COMP

nop;rjmp EE_RDY

nop;rjmp SPM_RDY

RESET:

; set stack pointer to top of RAM

ldi tmp, high(RAMEND)

out SPH, tmp

ldi tmp, low(RAMEND)

out SPL, tmp

; enable WDT with 2,1s timeout

ldi tmp, (1<<WDE)|(7<<WDP0)

out WDTCR, tmp

; enable external SRAM

ldi tmp, (1<<SRE)|(1<<SRW10)

out MCUCR, tmp

; enable interrupts

sei

; USART init

rcall USART_Init

// Unmask timer 0 overflov interrupt

ldi tmp, (1<<TOIE0)

out TIMSK, tmp

// Stop timer0

ldi tmp, 0b00000000

out TCCR0, tmp

clr RX_Flag

clr RX_Complete

ldi tmp, 0

out DDRB, tmp

ldi tmp, 0b11111111

out PORTB, tmp

loop:

wdr

cpi RX_Complete, 1

breq c_l0

rjmp l0

c_l0:

// reset RX_Complete

clr RX_Complete

// mask RXCIE

ldi tmp, (1<<TXEN) | (1<<RXEN)

out UCSRB, tmp

// reset RX_Buffer

ldi YL, low(RX_Buffer)

ldi YH, high(RX_Buffer)

ldi tmp3, 0xFF

// do command

mov tmp, command

andi tmp, 0b11100000

lsr tmp

lsr tmp

lsr tmp

lsr tmp

lsr tmp

cpi tmp, 0

brne dc_l0

WAIT_PUSK

ANALYZE_CLK_6

Rjmp dc_end

dc_l0:

cpi tmp, 1

brne dc_l1

WAIT_PUSK

ANALYZE_CLK_8

Rjmp dc_end

dc_l1:

cpi tmp, 2

brne dc_l2

WAIT_PUSK

ANALYZE_CLK_16

Rjmp dc_end

dc_l2:

cpi tmp, 3

brne dc_l3

WAIT_PUSK

ANALYZE_CLK_32

Rjmp dc_end

dc_l3:

cpi tmp, 4

brne dc_l4

WAIT_PUSK

ANALYZE_CLK_64

Rjmp dc_end

dc_l4:

cpi tmp, 5

brne dc_l5

WAIT_PUSK

ANALYZE_CLK_128

Rjmp dc_end

dc_l5:

cpi tmp, 6

brne dc_l6

WAIT_PUSK

ANALYZE_CLK_256

Rjmp dc_end

dc_l6:

cpi tmp, 7

breq cdc_unk

rjmp dc_unk

cdc_unk:

WAIT_PUSK

ANALYZE_CLK_VN

dc_end:

/*

// wait if need befor pusk

WAIT_PUSK

// analyse and store (6 cycles)

// clock time (1/7372800Mhz)*6 = 813,8ns

ANALYZE_CLK_6

*/

// reset RX_Buffer

ldi YL, low(RX_Buffer)

ldi YH, high(RX_Buffer)

// transmitt data

l1:

ld tmp, Y+

USART_TRANSMITT_M

Dec tmp3

brne l1

dec tmp3

l2:

ld tmp, Y+

USART_TRANSMITT_M

Dec tmp3

brne l2

ld tmp, Y+

USART_TRANSMITT_M

dc_unk:

// unmask RXCIE

ldi tmp, (1<<TXEN)|(1<<RXEN)|(1<<RXCIE)

out UCSRB, tmp

l0:

rjmp loop

////////////////////////////////////////////////////

// USART receive complete ISR

USART_RXC:

Push tmp

in tmp, SREG

push tmp

// tmp <- RX

in tmp, UDR

// if (RX_Flag == 1) goto urxc_l0

cpi RX_Flag, 1

breq urxc_l0

// if (RX == AA)

cpi tmp, 0xAA

brne urxc_end

// init timeout

ldi tmp, 0b00000101

out TCCR0, tmp

clr tmp

out TCNT0, tmp

// set recive_flag

ldi RX_Flag, 1

// reset RX_Buffer

ldi YL, low(RX_Buffer)

ldi YH, high(RX_Buffer)

clr RX_Counter

ldi tmp, 0xAA

urxc_l0:

// push RX to buffer

st Y+, tmp

inc RX_Counter

urxc_end:

pop tmp

out SREG, tmp

pop tmp

reti

////////////////////////////////////////////////////

// Timer0 overflow ISR

TIMER0_OVF:

Push tmp

Push tmp1

In tmp, SREG

push tmp

// Stop timer0

ldi tmp, 0b00000000

out TCCR0, tmp

// reset RX_Buffer

ldi YL, low(RX_Buffer)

ldi YH, high(RX_Buffer)

cpi RX_Counter, 3

brne t0ovf_l0

ld tmp, Y+

cpi tmp, 0xAA

brne t0ovf_l0

ld tmp, Y+

cpi tmp, 0x3A

brne t0ovf_l0

ld tmp, Y+

mov command, tmp

ldi RX_Complete, 1

//clear buffer

ldi YL, low(RX_Buffer)

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